Low Power VLSI Design and Tools Subhomoy Chattopadhyay and Rakesh Patel WCCG/ICG Intel Corporation, Chandler,AZ,USA. ASPDAC Seminar 1 Outline of the Tutorial 9.00: 9:15 Introduction and motivation, sources of dissipation Active power reduction methods 9:15-9.30 09:30-10.00 Power reduction in clocking circuits,buses etc 10.0 -10:15 Low power domino, SRAM design and leakage power reduction 10:15 -10:25 Conclusion and final thoughts 10:25-10:35 Q & A, Break